Back to results
US 2015/0149693 A1Published application
Targeted Copy of Data Relocation
AssigneeSanDisk Technologies LLC
InventorsYew Yin Ng, Mrinal Kochar, Niles Yang, Deepanshu Dutta
Life of this patent
Estimating the term…
Abstract
In a nonvolatile memory array that has a binary cache formed of SLC blocks and a main memory formed of MLC blocks, corrupted data along an MLC word line is corrected and relocated, along with any other data along the MLC word line, to binary cache, before it becomes uncorrectable. Subsequent reads of the relocated data directed to binary cache.
Claims19
A method of operating a block-erasable nonvolatile memory comprising:
- determining that a portion of data that is stored along a word line in a Multi Level Cell (MLC) block is disturbed by more than a threshold amount;
- identifying at least one other portion of data that is stored along the word line;
- copying the portion of data and the at least one other portion of data to a Single Level Cell (SLC) block in the nonvolatile memory;
- and
- marking the portion of data and the at least one other portion of data that are stored along the word line as obsolete while maintaining valid data in other word lines of the MLC block.
2 more elements
The method of claim S further comprising:
- performing one or more reads of the portion of data or the at least one other portion of data in the SLC block during the period of operation.
A method of operating a block-erasable nonvolatile memory array comprising:
- determining that a logical page of data that is stored along a word line in a Multi Level Cell (MLC) block contains more than a threshold number of bad bits;
- reading all logical pages of data that are stored along the word line;
- subsequently, performing Error Correction Code (ECC) correction of all logical pages of data that are stored along the word line;
- subsequently, writing ECC corrected copies of all logical pages of data that are stored along the word line to a binary cache portion of the nonvolatile memory array where valid copies of all logical pages of data that are stored along the word line are stored in Single Level Cell (SLC) format along different word lines;
- and
- marking the logical pages of data that are stored along the word line as obsolete while maintaining valid data in other word lines of the MLC block.
3 more elements
A block-erasable nonvolatile memory system comprising:
- a nonvolatile memory array that includes a Multi Level Cell (MLC) data storage area and a Single Level Cell (SLC) binary cache area;
- a disturbance detection unit that detects disturbance of stored data along a word line in the MLC data storage area;
- and
- a data relocation unit that is configured to relocate disturbed data in units that are smaller than a block from the MLC data storage area to the SLC binary cache area
1 more element
Dependencies are inferred from the claim text.