Method of programming non-volatile memory device and non-volatile memory device using the same

A method of operating a nonvolatile memory device including a plurality of memory blocks, each of the plurality of memory blocks including multi-level memory cells coupled to word lines and bit lines, the method comprising:

• performing a first program operation on selected memory cells coupled to a selected word line using a first incremental Step Pulse Program (ISPP) scheme, the first program operation including,
• applying a first pass voltage to an unselected word line during a first program period;
• applying a second pass voltage higher than the first pass voltage to the unselected word line during a second program period following the first program period;
• and
• applying a third pass voltage higher than the second pass voltage to the unselected word line during a third program period following the second program period, wherein
• the first program period includes at least two program loops, each of the second program period and the third program period includes at least one program loop, and
• memory cells coupled to the unselected word line and the selected memory cells coupled to the selected word line are included in a same memory block among the plurality of memory blocks.

A method of operating a nonvolatile memory device including a plurality of memory blocks, each of the plurality of memory blocks including multi-level memory cells coupled to word lines and bit lines, the method comprising:

• applying a program voltage to a selected word line coupled to first memory cells and second memory cells among the multi-level memory cells;
• applying a first pass voltage to an unselected word line until programming the first memory cells into a first target state is completed;
• and
• applying a second pass Voltage higher than the first pass voltage to the unselected word line after the programming the first memory cells into the first target state is completed,
• wherein memory cells coupled to the unselected word line and the first memory cells are included in a same selected memory block among the plurality of memory blocks.

A method of operating a nonvolatile memory device including a plurality of memory blocks, each of the plurality of memory blocks including multi-level memory cells coupled to word lines and bit lines, the method comprising:

• performing a least significant bit (LSB) page program operation on selected memory cells coupled to a selected word line using a first Incremental Step Pulse Program (ISPP) scheme, the LSB page program operation including applying a first pass voltage to an unselected word line;
• performing a most significant bit (MSB) page program operation on the selected memory cells coupled to the selected word line using a second ISPP scheme, the MSB page program operation including,
• applying a second pass voltage higher than the first pass voltage to the unselected word line during a first program loop;
• applying a third pass voltage higher than the second pass voltage to the unselected word line during a second program loop following the first program loop;
• and
• applying a fourth pass voltage higher than the third pass voltage to the unselected word line during a third program loop following the second program loop,
• wherein memory cells coupled to the unselected word line and the selected memory cells are included in a same selected memory block among the plurality of memory blocks.