Active rectifier and circuit for compensating for reverse current leakage using time delay scheme for zero reverse leakage current

An active rectifier comprising:

• a first loop configured to enable a current to flow in the first loop, the first loop being activated in an interval in which an input signal has a positive phase;
• and
• a second loop configured to enable a current to flow in the second loop, the second loop being activated in an interval in which the input signal has a negative phase;
• wherein each of the first loop and the second loop comprises a switch and a controller configured to generate a control signal to deactivate the switch in response to a predetermined time delay elapsing from a point in time at which the switch is activated.

An active rectifier comprising:

• a first loop configured to store a power of an interval in which an input signal has a positive phase;
• and
• a second loop configured to store a power of an interval in which the input signal has a negative phase;
• wherein each of the first loop and the second loop is further configured to deactivate a switch configured to control the active rectifier in response to a predetermined time delay elapsing from a point in time at which the switch is activated to compensate for reverse current leakage.