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US 2015/0145567 A1Published application
Cancellation of spurious tones within a phase-locked loop with a time-to-digital converter
AssigneeSilicon Laboratories Inc.
InventorMichael H. Perrott
Life of this patent
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Abstract
A phase-locked loop (PLL) includes a spur cancellation circuit that receives a residue signal indicative of a first frequency and receives a residual phase error signal and generates a spur cancellation signal. A summing circuit combines the spur cancellation signal and a first phase error signal corresponding to a phase difference between a reference signal and a feedback signal in the PLL and generates a second phase error signal with a reduced spurious tone at the first frequency.
Claims30
A phase-locked loop (PLL) comprising:
- a spur cancellation circuit coupled to receive a residue signal indicative of a first frequency and to receive a residual phase error signal and to generate a spur cancellation signal;
- and
- a summing circuit to combine the spur cancellation signal and a first phase error signal corresponding to a time difference between a reference signal and a feedback signal in the PLL and to generate a second phase error signal with a reduced spurious tone at the first frequency.
A method in a phase-locked loop (PLL) comprising:
- receiving a residue signal corresponding to a first frequency at a spur cancellation circuit;
- generating a spur cancellation signal for the first frequency using the residue signal and a residual phase error signal;
- and
- subtracting the spur cancellation signal from a first phase error signal corresponding to a time difference between a reference signal and a feedback signal in the PLL, to generate a second phase error signal with a reduced spurious tone at the first frequency.
1 more element
An apparatus comprising:
- a select circuit to selectively supply, according to a select signal, one of a plurality of residue signals as a selected residue signal;
- and
- a first spur cancellation circuit coupled to receive the selected residue signal and to receive a residual phase error signal, the spur cancellation circuit being configured to generate a spur cancellation signal to reduce a spurious tone at a first frequency associated with the selected residue signal,
- wherein the residual phase error signal has a reduced spurious tone at the first frequency.
1 more element
Dependencies are inferred from the claim text.