Method for manufacturing semiconductor device and alignment mark of semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorKotaro NODA
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AssigneeKabushiki Kaisha Toshiba
InventorKotaro NODA
Estimating the term…
According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include forming a stacked layer in a memory cell region and a mark region, forming a first mask layer above the stacked layer, and forming a second mask layer above the first mask layer; forming the second mask layer into first mask pattern features and forming a first alignment mark pattern feature; forming second mask pattern features and then removing the first mask pattern features; opening part of the second mask pattern features and forming a third mask layer having an opening; removing part of the second mask pattern features; removing the third mask layer; forming a fourth mask layer; etching the first mask layer; removing the fourth mask layer and then removing the second mask pattern features; and etching the stacked layer.
A method for manufacturing a semiconductor device comprising:
A method for manufacturing a semiconductor device comprising:
A method for manufacturing a semiconductor device comprising:
An alignment mark of a semiconductor device comprising third portions having a first portion and a second portion surrounding the first portion and made of a material different from the first portion when viewed from above, an upper surface of the second portion being lower than an upper surface of the first portion.
Dependencies are inferred from the claim text.