Embedded semiconductive chips in reconstituted wafers, and systems containing same
AssigneeIntel Corporation
InventorsRobert L. Sankman, John S. Guzek
Life of this patent
Estimating the term…
Abstract
A reconstituted wafer includes a rigid mass with a flat surface and a base surface disposed parallel planar to the flat surface. A plurality of dice are embedded in the rigid mass. The plurality of dice include terminals that are exposed through coplanar with the flat surface. A process of forming the reconstituted wafer includes removing some of the rigid mass to expose the terminals, while retaining the plurality of dice in the rigid mass. A process of forming an apparatus includes separating one apparatus from the reconstituted wafer.
Claims21
1-19. (canceled)
A microelectronic package comprising:
- a rigid mass with a flat surface and a base surface disposed parallel planar to the flat surface;
- and
- at least one semiconductor die embedded in the rigid mass, wherein the at least one semiconductor die has an active surface and a backside surface, wherein the at least one semiconductor die has at least one terminal which extends above the first die active surface, wherein a portion of the rigid mass extends above the at least one semiconductor die active surface, and wherein a surface of the at least one terminal is coplanar with the rigid mass flat surface.
A computing system comprising:
- a rigid mass with a flat surface and a base surface disposed parallel planar to the flat surface;
- a plurality of semiconductor dice embedded in the rigid mass, wherein the plurality of semiconductor die have an active surface and a backside surface, wherein a portion of the rigid mass extends over the plurality of semiconductor dice active surfaces, and wherein at least one of the plurality of semiconductor dice has a terminal which extends above the first die active surface that is coplanar with the rigid mass flat surface;
- wherein at least one of the plurality of semiconductor dice backside surface is coplanar with the rigid mass base surface;
- a bumpless build-up layer (BBUL) structure disposed above and on the flat surface, wherein the BBUL structure is coupled to at least one of the plurality of semiconductor dice;
- and
- at least one device coupled to the BBUL, wherein the BBUL forms an electrical connection between the at least one device and at least one of the plurality of semiconductor dice.
Dependencies are inferred from the claim text.