Integrated Circuit And Fabricating Method Thereof

An integrated circuit, comprising:

• a first substrate having at least one active device and a plurality of first metallic pads electrically connected to the active device, wherein the first substrate has front-end-of-line processing layers without back-end-of-line processing layers over the front-end-of-line processing layers;
• a second substrate having a semiconductor substrate, a plurality of through-silicon vias disposed in the semiconductor substrate, and an interconnect structure disposed on the semiconductor substrate, the interconnect structure has a plurality of second metallic pads, wherein the second substrate does not include any active devices;
• and
• a plurality of bump pads sandwiched by the first substrate and the second substrate,
• wherein the active device and the first metallic pads of the first substrate are electrically connected to the second metallic pads of the second substrate through the bump pads, and the through-silicon vias are respectively electrically connected to the second metallic pads.

A method of fabricating an integrated circuit, comprising:

• forming a first substrate having at least one active device and a plurality of first metallic pads, wherein the first metallic pads are electrically connected to the active device;
• forming a second substrate having an interconnect structure and a plurality of through-silicon-vias, wherein the interconnect structure has a plurality of second metallic pads, and the second metallic pads are respectively electrically connected to the through-silicon-vias;
• and
• bonding the first substrate and the second substrate to electrically connect the first metallic pads with the second metallic pads, such that the first substrate and the second substrate constitute an united structure,
• wherein the operation of forming the first substrate is performed by front-end-of-line processing without performing back-end-of-line processing, and the operation of forming the second substrate is performed by back-end-of-line processing without performing front-end-of-line processing.