Vertical memory devices

A vertical memory device, comprising:

• a substrate including a central region and a peripheral region;
• a plurality of first cell blocks on the central region, the first cell block including
• a first channel extending in a first direction vertical to a top surface of the substrate, and
• first gate lines surrounding the first channel and spaced apart from each other in the first direction;
• a plurality of second cell blocks on the peripheral region, the second cell block including a second channel extending in the first direction vertical to the top surface of the substrate, and second gate lines surrounding the second channel and spaced apart from each other in the first direction, and a distance
• between the plurality of second cell blocks that neighbor each other is greater than a distance between the plurality of first cell blocks that neighbor each other.

A vertical memory device, comprising:

• a substrate including a central region and a peripheral region;
• and
• a stacked structure on the substrate,
• the stacked structure including a plurality of channels extending in a first direction through a plurality of gate lines and a plurality of insulating layers alternately stacked on each other on the substrate,
• the plurality of channels being spaced apart from each other,
• the plurality of gate lines and insulating layers defining openings that expose the substrate and separate the stacked structure into a plurality of first cell blocks on the central region and at least one second cell block on the peripheral region of the substrate,
• each one of the at least one second cell block having one of,
• a width that is different than a width of any one of the plurality of first cell blocks, and
• a different separation distance from an adjacent one of the plurality of first cell blocks compared to a separation distance between the plurality of first cell blocks that neighbor each other.