Method of stress induced cleaving of semiconductor devices
AssigneeGlo AB
InventorsScott Brad Herner, Linda Romano, Daniel Bryce Thompson, Martin Schubert
Life of this patent
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AssigneeGlo AB
InventorsScott Brad Herner, Linda Romano, Daniel Bryce Thompson, Martin Schubert
Estimating the term…
A method of dicing semiconductor devices includes depositing a continuous first layer over the substrate, such that the first layer imparts a compressive stress to the substrate, and etching grooves in the first layer to increase local stress at the grooves compared to stress at the remainder of the first layer located over the substrate. The method also includes generating a pattern of defects in the substrate with a laser beam, such that a location of the defects in the pattern of defects substantially corresponds to a location of at least some of the grooves in the in the first layer, and applying pressure to the substrate to dice the substrate along the grooves.
A method of dicing semiconductor devices, comprising:
A method of dicing semiconductor devices, comprising:
Dependencies are inferred from the claim text.