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US 2015/0144863 A1Published application
Resistive memory device and fabrication methods
AssigneeCrossbar, Inc.
InventorsSung Hyun JO, Kuk-Hwan KIM, Tanmay KUMAR
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Abstract
A method for forming a resistive memory device includes providing a substrate comprising a first metal material, forming a conductive silicon-bearing layer on top of the first metal material, wherein the conductive silicon-bearing layer comprises an upper region and a lower region, and wherein the lower region is adjacent to the first metal material, forming an amorphous layer from the upper region of the conductive silicon-bearing layer, and disposing an active metal material above the amorphous layer.
Claims20
A resistive memory device comprises:
- a substrate comprising a first metal material;
- a monolithic semiconductor layer formed on the first metal material, wherein the monolithic semiconductor layer comprises an upper region and a lower region, wherein the lower region of the monolithic semiconductor layer comprises a conductive silicon-bearing material, and wherein the upper region of the monolithic semiconductor layer comprises a conductive silicon-bearing material subjected to an Argon plasma etch, and wherein the lower region is adjacent to the first metal material;
- and
- an active metal material disposed above the upper region.
1 more element
A semiconductor device comprises:
- a semiconductor substrate;
- a plurality of CMOS devices formed upon the semiconductor substrate;
- a first dielectric layer disposed above the plurality of CMOS devices;
- a first wiring layer disposed above the first dielectric layer, wherein the first wiring layer is coupled to at least one CMOS device of the plurality of CMOS devices, wherein the first wiring layer comprises a first metal material;
- a monolithic semiconductor layer disposed upon on the first wiring layer and comprising a conductive silicon-bearing material, wherein the monolithic semiconductor layer comprises an upper region and a lower region, wherein the upper region of the monolithic semiconductor layer comprises the silicon-bearing material that is subjected to a plasma etch or ion implantation, and wherein the lower region is adjacent to the first wiring layer;
- an active metal layer disposed above the upper region of the monolithic semiconductor layer;
- and
- a second wiring layer disposed above the active metal layer;
- wherein a resistive memory device is formed from the monolithic semiconductor layer and the active metal layer.
6 more elements
Dependencies are inferred from the claim text.