Methodology for pattern correction

A method for pattern correction, comprising:

• forming an integrated chip (IC) design comprising a graphical representation of an integrated chip having a plurality of main feature shapes;
• adding a plurality of dummy shapes to the IC design, wherein the plurality of dummy shapes are configured to improve a process window of the IC design;
• performing an optical proximity correction (OPC) process to add assist features to one or more of the plurality of main feature shapes and to one or more of the plurality of dummy shapes;
• performing a first iterative pattern correction process to correct the plurality of main feature shapes and the assist features of the plurality of main feature shapes over a first number of iterations;
• and
• performing a second iterative pattern correction process to correct the one or more of the plurality of dummy shapes and for assist features of the one or more of the plurality of dummy shapes over a second number of iterations;
• wherein a computer is used to form the IC design, add the plurality of dummy shapes to the IC design, perform the OPC process, perform the first iterative pattern correction process, or perform the second iterative pattern correction process.

An EDA (Electronic design automation) tool disposed within a computer readable storage device, comprising:

• a design tool configured to form an integrated chip (IC) design comprising a graphical representation of an integrated chip having a plurality of main feature shapes;
• a dummy shape insertion element configured to add a plurality of dummy shapes to the IC design, wherein the plurality of dummy shapes are configured to improve a process window of the IC design;
• and
• a pattern correction element configured to operate upon one or more of the plurality of dummy shapes with a first pattern correction process, and to operate upon one or more of the plurality of main feature shapes with a second pattern correction process separate from the first pattern correction process;
• wherein the first pattern correction process comprises a first iterative process configured to correct the one or more of the plurality of main feature shapes over a first number of iterations;
• wherein the second pattern correction process comprises a second iterative process configured to correct the one or more of the plurality of dummy shapes over a second number of iterations, wherein the second number of iterations is less than the first number of iterations.