Performing Processing Operations for Memory Circuits using a Hierarchical Arrangement of Processing Circuits

A memory die, comprising:

• memory circuits;
• a controller;
• and
• memory die processing circuits;
• wherein the memory die is configured to be coupled in a hierarchical processing arrangement with at least one of a logic die and a processor die;
• and
• wherein the controller is configured to cause the memory die processing circuits to perform memory die processing operations on data retrieved from or destined for the memory circuits based on a command received from the logic die or the processor die.

A logic die, comprising:

• a controller;
• and
• logic die processing circuits;
• wherein the logic die is configured to be coupled in a hierarchical processing arrangement with at least one of a memory die and a processor die;
• and
• wherein the controller is configured to cause the logic die processing circuits to perform logic die processing operations on data retrieved from or destined for memory circuits in a memory die based on a command received from the processor die or the memory die.