Shared memory architecture for a neural simulator
AssigneeQUALCOMM Incorporated
InventorsVenkat Rangan, Jan Krzys Wegrzyn, Jeffrey Alexander Levin, John Paul Daniels
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Abstract
Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.
Claims22
A method for allocating memory in an artificial nervous system simulator implemented in hardware, comprising:
- determining memory resource requirements for one or more components of an artificial nervous system being simulated;
- and
- allocating portions of a shared memory pool to the components based on the determination.
An apparatus for allocating memory in an artificial nervous system simulator implemented in hardware, comprising a processing system configured to:
- determine memory resource requirements for one or more components of an artificial nervous system being simulated;
- and
- allocate portions of a shared memory pool to the components based on the determination.
An apparatus for allocating memory in an artificial nervous system simulator implemented in hardware, comprising:
- means for determining memory resource requirements for one or more components of an artificial nervous system being simulated;
- and
- means for allocating portions of a shared memory pool to the components based on the determination.
A computer-readable medium having instructions executable by a computer stored thereon for allocating memory in an artificial nervous system simulator implemented in hardware, comprising:
- instructions for determining memory resource requirements for one or more components of an artificial nervous system being simulated;
- and
- instructions for allocating portions of a shared memory pool to the components based on the determination.
Dependencies are inferred from the claim text.