Bit line and compare voltage modulation for sensing nonvolatile storage elements

A non-volatile storage apparatus, comprising:

• a plurality of non-volatile storage elements;
• a plurality of word lines including a first set of word lines and a second set of word lines;
• a plurality of bit lines connected to the non-volatile storage elements;
• and
• one or more managing circuits in communication with the plurality of bit lines and the plurality of word lines, the one or more managing circuits apply a first set of one or more bit line voltages to the plurality of bit lines, the one or more managing circuits verify programming for non-volatile storage elements connected to the first set of word lines and the plurality of bit lines in response to the first set of one or more bit line voltages, the one or more managing circuits apply a second set of one or more bit line voltages to the plurality of bit lines, the first set of one or more bit line voltages are lower than the second set of one or more bit line voltages, the one or more managing circuits verify programming for non-volatile storage elements connected to the second set of word lines and the plurality of bit lines in response to the second set of one or more bit line voltages, the non-volatile storage elements connected to the first set of word lines are programmed prior to the non-volatile storage elements connected to the second set of word lines after a common erasing, the one or more managing circuits apply one or more read bit line voltages to the plurality of bit lines, the one or more managing circuits read the non-volatile storage elements connected to the first set of word lines and the plurality of bit lines in response to the one or more read bit line voltages, either the verifying programming for non-volatile storage elements connected to the first set of word lines or the reading the non-volatile storage elements connected to the first set of word lines includes applying a compare voltage for a data state on the first set of word lines that is different than another compare voltage for the data state used for non-volatile storage elements connected to the second set of word lines.

A method for operating non-volatile storage, comprising:

• applying a first set of one or more bit line voltages to a plurality of bit lines;
• verifying programming for non-volatile storage elements connected to a first set of word lines and the plurality of bit lines in response to the first set of one or more bit line voltages;
• applying a second set of one or more bit line voltages to the plurality of bit lines, the first set of one or more bit line voltages are lower than the second set of one or more bit line voltages;
• verifying programming for non-volatile storage elements connected to a second set of word lines and the plurality of bit lines in response to the second set of one or more bit line voltages, the non-volatile storage elements connected to the first set of word lines are programmed prior to the non-volatile storage elements connected to the second set of word lines after a common erasing;
• applying one or more read bit line voltages to the plurality of bit lines;
• and
• reading the non-volatile storage elements connected to the first set of word lines and the plurality of bit lines in response to the one or more read bit line voltages, the verifying programming for non-volatile storage elements connected to the first set of word lines includes applying a first compare voltage for a data state on the first set of word lines and the reading the non-volatile storage elements connected to the first set of word lines includes applying a second compare voltage for the data state on the first set of word lines, the first and second compare voltages are different than a third compare voltage for the data state used for verifying programming of non-volatile storage elements connected to the second set of word lines and a fourth compare voltage for the data state used for reading the non-volatile storage elements connected to the second set of word lines.