ESD Protection Devices and Methods
AssigneeInfineon Technologies AG
InventorsChristian Russ, Werner Hoellinger, Bernhard Stein
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Abstract
Various embodiments described below relate to an ESD protection device that includes a voltage controlled shunt (e.g., a transistor) to selectively shunt energy of an incoming ESD pulse away from a circuit that includes a semiconductor device to be protected. In some embodiments, the ESD protection device includes a power up detection element to determine whether the circuit has powered up. If the circuit is powered up, the power up detection element prevents inadvertent triggering of the ESD protection device.
Claims20
An electrostatic discharge (ESD) protection device to protect a circuit coupled to first and second circuit nodes from an ESD event, the ESD protection device comprising:
- a first electrical path extending between the first and second circuit node and including a voltage controlled shunt thereon, the voltage controlled shunt having a control terminal to control an amount of energy shunted over the first electrical path via the voltage controlled shunt;
- and
- a power up detection element comprising an input coupled to the circuit, and an output coupled to the control terminal of the voltage controlled shunt.
An electrostatic discharge (ESD) protection device for protecting a semiconductor device of a circuit, the ESD protection device comprising:
- a power up detection element to monitor the circuit and provide a power up control signal indicative of whether the circuit is powered up;
- an ESD detection element to monitor voltage on a first circuit node and provide an ESD pulse signal indicative of whether the monitored voltage is representative of an incoming ESD pulse;
- a voltage controlled shunt coupled between the first circuit node and a second circuit node and which is arranged to selectively shunt energy of the incoming ESD pulse from the first circuit node to the second circuit node based on the ESD pulse signal and the power up control signal.
A method of electrostatic discharge (ESD) protection in a circuit, wherein the circuit includes a voltage controlled shunt that is coupled between first and second circuit nodes and which is arranged to selectively shunt energy of an incoming ESD pulse from the first circuit node to the second first circuit node and away from a semiconductor device to be protected on the circuit, the method comprising:
- monitoring voltage on the first circuit node and asserting an ESD detection signal for a predetermined time if the slope and magnitude of the voltage exceed predetermined thresholds;
- monitoring the circuit and selectively asserting a power up control signal if the circuit is powered up;
- providing a shunt control voltage to the voltage controlled shunt based on both the power up control signal and the ESD detection signal;
- wherein the voltage controlled shunt shunts energy of the incoming ESD pulse from the first circuit node to the second circuit node based on the shunt control signal.
The method of claim 20, wherein the circuit comprises a system-on-chip (SoC) design that includes a number of blocks having different operating frequencies and different power supply domains.
Dependencies are inferred from the claim text.