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US 2015/0102505 A1Published application
Semiconductor package and method of fabricating the same
AssigneeSamsung Electronics Co., Ltd.
InventorsHYUNSOO CHUNG, SEUNGDUK BAEK, IN-YOUNG LEE, TAE-JE CHO
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Abstract
A semiconductor package and a method of fabricating the same. The method may include mounting a lower stack including a plurality of lower semiconductor chips on a substrate and mounting an upper stack including a plurality of upper semiconductor chips on the lower stack. According to example embodiments of the inventive concept, the semiconductor package can be easily fabricated.
Claims19
A method of fabricating a semiconductor package, comprising:
- mounting a lower stack including a plurality of lower semiconductor chips on a substrate;
- forming a lower mold layer on the substrate to enclose a side surface of the lower stack and expose a top surface of the lower stack;
- and
- mounting an upper stack including a plurality of upper semiconductor chips on the lower stack having the side surface enclosed by the lower mold layer.
1 more element
A semiconductor package, comprising:
- a substrate;
- first, second, third, and fourth semiconductor chips sequentially stacked on the substrate;
- a lower mold layer disposed on the substrate to enclose side surfaces of the first and second semiconductor chips, an uppermost surface of the lower mold layer being positioned at a level lower than a top surface of the second semiconductor chip;
- and
- an upper mold layer covering the lower mold layer and the third and fourth semiconductor chips and including a different material from the lower mold layer.
2 more elements
A method of fabricating a semiconductor package, comprising:
- forming a first mold layer between a substrate and a first stack of semiconductor chips mounted thereon and along sides of the first stack such that a top surface of the first stack is exposed to mount a second stack of semiconductor chips;
- and
- forming a second mold layer underneath and along sides of the mounted second stack such that a top surface of the second stack is exposed to mount another semiconductor chip stack.
Dependencies are inferred from the claim text.