Nanowire mosfet with support structures for source and drain

A method for forming a nanowire field effect transistor (FET) device, the method comprising:

• forming a device layer including a source region and a drain region, the source region and the drain region being connected by a nanowire channel to be suspended
• the nanowire channel being provided over a sacrificial material;
• forming etch stop layers beneath the source region and the drain region, the etch stop layers comprising support structures interposed between a semiconductor substrate and the source and drain regions,
• the etch stop layers selectively including at least one of a carbon-doped silicon layer, a non-doped silicon layer, and a boron-doped silicon layer;
• and
• suspending the nanowire channel by:
• etching the sacrificial material beneath the nanowire channel, the etching being selective to the sacrificial material to prevent the removal of the etch stop layers beneath the source region and the drain region.