Printed wiring board, method for manufacturing printed wiring board and package-on-package

A printed wiring board, comprising:

• an interlayer resin insulation layer;
• a plurality of pad portions formed on the interlayer resin insulation layer;
• a resin insulation layer formed on the interlayer resin insulation layer and the pad portions such that the resin insulation layer has a plurality of first opening portions exposing the pad portions in a central portion of the interlayer resin insulation layer and a plurality of second opening portions exposing the pad portions in a peripheral portion of the interlayer resin insulation layer;
• and
• a plurality of metal posts formed on the pad portions in the peripheral portion of the interlayer resin insulation layer, respectively, and having curved side-wall portions forming narrowed portions between the end portions and opposite end portions of the metal posts, respectively.

A package-on-package device, comprising:

• a first substrate;
• an IC chip mounted on the first substrate;
• a second substrate mounted on the first substrate;
• and
• a mold resin layer filling a space formed between the first substrate and the IC chip,
• wherein the first substrate includes an interlayer resin insulation layer, a plurality of pad portions formed on the interlayer resin insulation layer, a resin insulation layer formed on the interlayer resin insulation layer and the pad portions such that the resin insulation layer has a plurality of first opening portions exposing the pad portions in a central portion of the interlayer resin insulation layer and a plurality of second opening portions exposing the pad portions in a peripheral portion of the interlayer resin insulation layer, and a plurality of metal posts formed on the pad portions in the peripheral portion of the interlayer resin insulation layer, respectively, and having curved side-wall portions forming narrowed portions between the end portions and opposite end portions of the metal posts, respectively, the mold resin layer has a plurality of opening portions exposing the end portions of the metal posts, respectively, the first substrate has a plurality of first bumps mounting the IC chip on the pad portions in the central portion of the interlayer resin insulation layer, and the second substrate has a plurality of second bumps connecting to the end portions of the metal posts exposed from the opening portions of the mold resin layer.