US 2015/0087123 A1 · CONTACT STRAP FOR MEMORY ARRAY

Abstract

Devices and methods for forming a device are disclosed. The method includes providing a substrate having a memory array region. Front end of line (FEOL) process is performed to form components of memory cell pairs. The FEOL process forms storage gates, access gates or word lines, source/drain regions, spacers, erase gates and source line isolation dielectrics. The memory cell pair shares a common source line (SL). A SL strap opening is provided. The source line strap opening is formed between adjacent memory cell pair. The source line strap opening does not overlap the storage gate of the memory cell.

Claims20

Dependent claims

A method for forming a device comprising:

providing a substrate having a memory array region;
performing front end of line (FEOL) process to form components of memory cell pairs, wherein the FEOL process forms storage gates, access gates or word lines, buried source lines, spacers, erase gates and source line isolation dielectrics, and wherein a memory cell pair shares a common source line (SL);
providing a SL strap opening, wherein the source line strap opening is formed between adjacent memory cell pair, wherein the source line strap opening does not overlap the storage gate of the memory cell.

Dependencies are inferred from the claim text.

Facts

Application

14/491,981Filed 20 Sep 2014

Priority

20 Sep 2013

Published

26 Mar 2015

Term ends

Not estimatedThe source records don’t support an estimate.

Classification12 codes

H10B 41/30
Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates: characterised by the memory core region
H10B 41/40
Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates: characterised by the peripheral circuit region
H10B 41/50
Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates: characterised by the boundary region between the core…
H10D 30/68
Insulated-gate field-effect transistors [IGFET]: floating-gate IGFETs

Contact strap for memory array

Life of this patent

Contact strap for memory array

Life of this patent

Abstract

Claims20