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US 2015/0084685 A1Published application
Cascode transistor and method of controlling cascode transistor
AssigneeFujitsu Limited
InventorsTatsuya Hirose, Kazukiyo Joshin
Life of this patent
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Abstract
A cascode transistor includes: a first switch; a second switch that has a withstand voltage higher than that of the first switch and is cascade coupled to a drain of the first switch; and a circuit in which a third switch and a capacitor are coupled in series with each other and that is provided between a connection node and a source of the first switch, the connection node being a node at which the first switch and the second switch are coupled to each other.
Claims12
A cascade transistor comprising:
- a first switch;
- a second switch that has a withstand voltage higher than that of the first switch and is cascade coupled to a drain of the first switch;
- and
- a circuit in which a third switch and a capacitor are coupled in series with each other and that is provided between a connection node and a source of the first switch, the connection node being a node at which the first switch and the second switch are coupled to each other.
1 more element
A method of controlling a cascode transistor that includes
- a first switch,
- a second switch that has a higher withstand voltage than the first switch and is cascode coupled to a drain of the first switch, and
- a circuit in which a third switch and a capacitor are coupled in series with each other and that is provided between a connection node and a source of the first switch, the connection node being a node at which the first switch and the second switch are coupled to each other,
- the method comprising:
- electrically coupling the capacitor to the connection node by turning the third switch on before a gate of the first switch is turned off.
2 more elements
A semiconductor device comprising:
- a first switch that is formed on a semiconductor substrate or a second switch that has a higher withstand voltage than the first switch, is cascode coupled to the first switch and is formed on the semiconductor substrate;
- and
- a circuit in which a third switch and a capacitor are coupled in series with each other on the semiconductor substrate and that is provided between a connection node, at which the first switch and the second switch are coupled to each other, and a source of the first switch.
Dependencies are inferred from the claim text.