Methods of forming semiconductor devices and structures with improved planarization uniformity, and resulting structures and semiconductor devices

A method of forming a semiconductor device structure, comprising:

• forming a conductive pad material coupled to peripheral conductive contacts in a peripheral region of a semiconductor device structure and coupled to a memory cell material in an array region of the semiconductor device structure;
• selectively removing portions of the conductive pad material to define conductive pads in the peripheral region and to define conductive lines in the array region;
• forming a spacer material over the conductive pads and the conductive lines;
• and
• planarizing the semiconductor device structure using at least one of the conductive pad material and conductive lines, and the spacer material as a planarization stop material.

A method of forming a phase change memory device, comprising:

• forming a phase change memory cell material in an array region;
• forming first array trenches extending in a first direction through the phase change memory cell material to partially define phase change memory cells in the array region;
• after forming the first array trenches, forming peripheral conductive contacts coupled to respective portions of a peripheral transistor, and
• after forming the peripheral conductive contacts, forming second array trenches extending in a second direction different from the first direction through the phase change memory cell material to fully define the phase change memory cells in the array region.

A semiconductor device structure, comprising:

• a peripheral region, comprising:
• peripheral conductive contacts coupled to at least one transistor, conductive pads comprising a conductive material, the conductive pads coupled to respective peripheral conductive contacts, the conductive pads each having an upper surface area greater than an upper surface area of a peripheral conductive coupled thereto;
• and
• peripheral trenches separating the conductive pads;
• and
• an array region, comprising:
• an array of memory cells;
• and
• conductive lines each coupled to memory cells of the array of memory cells, the conductive lines comprising the same conductive material as the conductive pads in the peripheral region.

A phase change memory device, comprising:

• phase change memory cells comprising phase change memory cell materials electrically isolated from one another in a first direction by first trenches and in a second direction by second trenches;
• conductive lines coupled to phase change memory cells aligned in the second direction;
• and
• peripheral conductive pads coupled to peripheral conductive contacts, the peripheral conductive pads coplanar with the conductive lines.