Method of Improving Timing Critical Cells For Physical Design In The Presence Of Local Placement Congestion

A non-transitory storage medium for storing optimized circuits having a congested placement with a timing critical placement map storing instructions for executing by a processing circuit for performing a method comprising:

• determining non-critical circuit components safe to be moved wherein non-critical circuit components are circuits in which a change to its physical placement will not degrade the timing below an acceptable threshold or introduce a new timing violation;
• removing all non-critical circuit components from said timing critical placement map to generate a new partial placement map;
• optimizing critical circuit components in said new partial placement map free of all of said non-critical circuit components wherein said critical circuit components are a set of circuit components that are not non-critical circuit components;
• inserting new circuit components to replace failing critical circuit components;
• and
• reinserting all of said non-critical circuit components that were previously removed from said timing critical placement map into said new partial placement map.