Canary circuit with passgate transistor variation
AssigneeAdvanced Micro Devices, Inc.
InventorRussell Schreiber
Life of this patent
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Abstract
A canary circuit with passgate transistor variation is described herein. The canary circuit includes a memory canary circuit that has a plurality of bitcells. Each bitcell has at least a passgate transistor that is driven by a wordline voltage. The canary circuit further includes a regulator circuit that outputs a wordline voltage that accounts for a predetermined offset of a threshold voltage of the passgate transistor. In an embodiment, the regulator circuit is a subtractor circuit that generates the wordline voltage from a reference voltage based in part on the threshold voltage variation of the passgate transistor.
Claims23
An apparatus, comprising:
- a memory canary circuit including a plurality of bitcells, each bitcell having at least one passgate transistor;
- and
- a regulator circuit configured to output a wordline voltage that accounts for a predetermined offset from a threshold voltage of the passgate transistor, wherein the passgate transistor is driven by the wordline voltage.
An integrated circuit, comprising:
- a plurality of canary circuits distributed across the integrated circuit, wherein each canary circuit has a passgate transistor and is configured to account for a predetermined offset from a threshold voltage of the passgate transistor;
- and
- a controller connected to each canary circuit, wherein the controller is configured to poll the plurality of canary circuits to determine an operating margin.
A method for handling passgate transistor variation, comprising:
- connecting a regulator circuit to a canary circuit which includes a plurality of bitcells, each bitcell having a passgate transistor;
- and
- generating, at the regular circuit, a wordline voltage that accounts for a predetermined offset from a threshold voltage of the passgate transistor;
- and
- driving the passgate transistor with the wordline voltage.
A computer-readable storage medium configured to store a set of instructions used for manufacturing a device, wherein the device comprises:
- a memory canary circuit including a plurality of bitcells, each bitcell having at least one passgate transistor;
- and
- a regulator circuit configured to output a wordline voltage that accounts for a predetermined offset from a threshold voltage of the passgate transistor, wherein the passgate transistor is driven by the wordline voltage.
Dependencies are inferred from the claim text.