Memory cell array structures and methods of forming the same
AssigneeMicron Technology, Inc.
InventorsMarcello Ravasio, Samuele Sciarrillo, Roberto Somaschini, Gabriel L. Donadio
Life of this patent
Estimating the term…
Abstract
The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
Claims30
An array of memory cells, comprising:
- a stack structure comprising a memory cell between a first conductive material and a second conductive material, wherein the memory cell includes a select element and a memory element;
- and
- an electrically inactive stack structure located at an edge of the stack structure.
An array of memory cells, comprising:
- a first electrically active stack structure comprising a select element between a first electrode and a second electrode and a memory element between the second electrode and a third electrode;
- a second electrically active stack structure electrically coupled to the first electrically active stack structure;
- a first electrically inactive stack structure located at an outer edge of the first electrically active stack structure;
- and
- a second electrically inactive stack structure located at an outer edge of the second electrically active stack structure.
An array of memory cells, comprising:
- a plurality of first stack structures, each comprising:
- a first conductive material between a substrate material and a first electrode material;
- a select element between the first electrode and a second electrode;
- and
- a memory element between the second electrode and a third electrode;
- a first and a second electrically inactive dummy stack structure, each located at a different outer edge of the plurality of first stack structures;
- a first dielectric material between each of the plurality of first stack structures and between the plurality of first stack structures and the first and second electrically inactive dummy stack structures;
- a plurality of second stack structures formed on the plurality of first stack structures, each comprising a second conductive material;
- a third and fourth electrically inactive dummy stack structure, each located at a different outer edge of the plurality of second stack structures;
- and
- a second dielectric material between each of the plurality of second stack structures and between the plurality of second stack structures and the third and fourth electrically inactive dummy stack structures,
- wherein the array of memory cells is a cross-point array of memory cells.
A method of forming an array of memory cells, comprising:
- patterning an active memory cell stack structure and a dummy material stack structure to expose the dummy material stack structure;
- removing a portion of the dummy material stack structure;
- and
- forming the dielectric material over the dummy material stack structure to electrically inactivate the dummy material stack structure.
A method of forming an array of memory cells, comprising:
- forming a first electrically active memory cell stack structure;
- forming a first dummy memory cell stack structure located at an edge of the first electrically active stack structure;
- performing a first chop sequence on the first electrically active memory cell stack structure and the first dummy memory cell stack structure to electrically inactivate the first dummy memory cell stack structure;
- and
- forming a second electrically active memory cell stack structure over the first electrically active memory cell stack structure.
Dependencies are inferred from the claim text.