Semiconductor devices with close-packed via structures having in-plane routing and method of making same

A semiconductor structure comprising close-packed vias and re-distribution layer(s) (RDL) or routings that are essentially flush with surrounding substrate surface, comprising:

• a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS);
• at least one conductive wafer-through via comprising metal;
• wherein the conductive wafer-through via comprises two parts, a first narrow part extending from the first side, and a second wide part extending from the second side, and wherein the first narrow part is completely filled with metal, whereas the interior of the wide part is coated with metal only on the inner surfaces thereof;
• at least one narrow recess provided in the surface of the first side of the substrate and in the semiconductor material of the substrate, said recess extending in the plane of the substrate from the via to a point at a distance from the via, the recess being filled with metal to provide routing connected with the wafer-through via;
• wherein
• the exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate providing a structure which is flat or having minimum topography;
• and wherein
• there is a multi-layered routing structure provided on the flat substrate surface on said first side of the substrate.

A method of making a semiconductor structure, comprising:

• providing a substrate of a semiconductor material having a first side (FS) and a second side (BS);
• patterning the first side (FS) of the substrate to provide a first mask for a recess in the semiconductor material of the substrate;
• patterning the substrate to provide a second mask for a blind hole having a high aspect ratio AR, i.e. AR=depth:width>1:1;
• etching through said second mask to provide a blind hole in the substrate;
• etching through the first mask to provide said recess in the substrate and to round off the edges of the hole;
• further comprising:
• making a hole from the second side of the substrate either before the step of patterning to provide said first mask on the first side or after the blind hole is made;
• wherein the second side hole is made to a depth and at location matching the depth and location of the first side blind hole, such that a wafer-through hole is created;
• depositing metal to fill said hole and said recess;
• further comprising applying a chemical-mechanical polishing process to planarize the substrate;
• and
• integrating a multi-layer routing structure on said planarized substrate.