Compact Memory Device including a SRAM Memory Plane and a Non Volatile Memory Plane, and Operating Methods

A memory device comprising a memory cell, the memory cell comprising:

• an elementary SRAM-type cell comprising first and second inverters connected to one another crosswise;
• and
• an elementary module coupled between a supply terminal and the elementary SRAM-type cell;
• wherein the elementary module comprises a single nonvolatile EEPROM elementary memory cell that includes a floating gate transistor, the elementary module also comprising an interconnection stage that can be controlled by a control signal external to the memory cell;
• wherein the nonvolatile elementary memory cell and the controllable interconnection stage are connected to one another;
• wherein the floating gate transistor of has a first conduction electrode connected to the supply terminal, a control electrode connected to a first control line, and a second conduction electrode connected to an output of the first inverter;
• and
• wherein the floating gate transistor of the nonvolatile memory cell is controllable to be turned off when a data item stored in the elementary SRAM-type cell is programmed into the nonvolatile elementary cell.