Power saving method and apparatus for first in first out (fifo) memories

A method, comprising:

• receiving data resulting from execution of a central processing unit (CPU) instruction, the data to be written to a memory address of a memory;
• preventing writing the data when the address is contiguous with respect to the immediately previous address and the data is the same as data in an immediate previous memory address of the memory;
• receiving a read request for the memory address;
• preventing reading data from the memory address when the data is the same as the data in the immediate previous memory address;
• and
• using data stored in a register outside the memory that is the same as the data stored in the immediate previous memory address to satisfy the read request when the data is the same as the data in the immediate previous memory address.

An system, comprising:

• a processing component;
• a first-in, first-out (FIFO) memory;
• and
• a memory manager component operative on the processing component to:
• prevent writing data to a memory address of the FIFO memory when the write address is contiguous with respect to the immediately previous address and the data is the same as data in an immediate previous memory address of the FIFO memory;
• and
• prevent reading data from the memory address of the FIFO memory when the data is the same as the data in the immediate previous memory address of the FIFO memory.