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US 2014/0349454 A1Published application
Methods of forming charge storage structures including etching diffused regions to form recesses
AssigneeMicron Technology, Inc.
InventorsAlex Schrinsky, Anish Khandekar, Pavan Aella, Niraj B. Rana
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Abstract
Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.
Claims19
A method of forming a memory string, comprising:
- forming a stack of alternating layers of semiconductor material and dielectric material;
- forming an opening within the stack;
- diffusing a dopant into the semiconductor material exposed to the opening to form a plurality of diffused regions, each of the diffused regions extending a distance into the semiconductor material from a sidewall of the opening;
- selectively etching the diffused regions to form recesses in the semiconductor material, wherein etching substantially stops at each interface between the semiconductor material and the diffused regions;
- forming charge storage structures within the recesses;
- and
- forming a channel region within the opening.
4 more elements
A method of forming a memory device, comprising:
- forming a number of memory strings, wherein forming the memory strings includes:
- forming a stack of alternating silicon and dielectric layers;
- forming an opening within the stack;
- forming a P-N interface within the opening in the stack with n-type regions being exposed within the opening;
- selectively etching the n-type regions to form recesses wherein etching substantially stops at the P-N interface;
- forming charge storage structures within the recesses;
- forming a channel region within the opening;
- and
- coupling the number of memory strings together using source lines and data lines.
6 more elements
A method of forming an information handling system, comprising:
- forming a number of memory strings, wherein forming the memory strings includes:
- forming a stack of alternating silicon and dielectric layers;
- forming an opening within the stack;
- forming a P-N interface within the opening in the stack with selective etch regions being exposed within the opening;
- selectively etching the selective etch regions to form recesses wherein etching substantially stops at the P-N interface;
- forming charge storage structures within the recesses;
- forming a channel region within the opening;
- coupling the number of memory strings together using source lines and data lines;
- and
- coupling a processor to the number of memory strings through the source lines and data lines.
7 more elements
Dependencies are inferred from the claim text.