Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness
AssigneeSunEdison Semiconductor Limited (UEN201334164H)
InventorsQingmin Liu, Jeffrey L. Libbert
Life of this patent
Estimating the term…
Abstract
A method for reducing light point defects of a semiconductor-on-insulator structure and a method for reducing the surface roughness of a semiconductor-on-insulator structure are disclosed. The methods can include a combination of thermally annealing the structure followed by a non-contact smoothing process.
Claims20
A method for processing a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer, the silicon layer having a cleaved surface defining an outer surface of the structure, the method comprising the steps of:
- thermally annealing the structure in an environment comprising a gas selected from the group consisting of argon, hydrogen, helium and mixtures thereof at a temperature of at least about 950° C., wherein the environment contains less than about 10 ppm of oxygen;
- and
- performing a non-contact smoothing process on the cleaved surface.
A method for reducing light point defects of a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer, the silicon layer having a cleaved surface defining an outer surface of the structure, the method comprising:
- thermally annealing the structure in an environment comprising a gas selected from the group consisting of argon, hydrogen, helium and mixtures thereof at a temperature of at least about 950° C., wherein the environment contains less than about 10 ppm of oxygen;
- and
- performing a non-contact smoothing process on the structure.
A method for reducing the surface roughness of a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer, the silicon layer having a cleaved surface defining an outer surface of the structure, the method comprising:
- thermally annealing the structure in an environment comprising a gas selected from the group consisting of argon, hydrogen, helium and mixtures thereof at a temperature of at least about 950° C., wherein the environment contains less than about 10 ppm of oxygen;
- and
- performing a non-contact smoothing process on the structure.
A method for processing a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer, the silicon layer having a cleaved surface defining an outer surface of the structure, the method comprising the steps of:
- thermally annealing the structure in a pure argon environment at a temperature of at least about 950° C., wherein the environment contains less than about 10 ppm of oxygen;
- and
- performing a non-contact smoothing process on the cleaved surface.
Dependencies are inferred from the claim text.