Complementary metal oxide or metal nitride heterojunction memory devices with asymmetric hysteresis property

A method of forming a memory device comprising:

• providing a substrate;
• depositing a first metal layer;
• selecting a first metal oxide layer coupled to the first metal layer;
• selecting a second metal oxide layer coupled to the first metal oxide layer;
• depositing a second metal layer coupled to the second metal oxide layer;
• wherein:
• the first metal oxide layer is characterized by a first state having a first resistance and a second state having a second resistance;
• the second metal oxide layer is characterized by a third state having a third resistance state and a fourth state having a fourth resistance;
• and
• the first resistance is higher than the second resistance;
• the third resistance is higher than the fourth resistance;
• and
• the device having a property of forming asymmetric hysteresis loop when a positive and a negative bias is applied across the device.

A method of operating a memory device, comprising:

• applying a first positive electrical bias to the device and measuring a first positive current;
• applying a second positive electrical bias to the device and measuring a second positive current;
• applying a first negative electrical bias to the device and measuring a first negative current;
• applying a second negative electrical bias to the device and measuring a second negative current;
• and
• selecting a sensing electrical bias for the device by comparing a difference between the first and second positive current, and a difference between the first and second negative current.