Method of forming a cmos structure having gate insulation films of different thicknesses

A semiconductor integrated circuit device comprising,

• a first MOS transistor;
• a second MOS transistor having the same conductivity type with the first MOS transistor and providing a gate insulation film thickness being thicker than the first MOS transistor and a drain connected to the first MOS transistor;
• and
• a power supply line connected to a source of the second MOS transistor,
• wherein a control signal having a first state for allowing the second MOS transistor to be on-state and a second state for allowing the second MOS transistor to be off-state is applied to a gate of the second MOS transistor.

A semiconductor integrated circuit device comprising:

• a first MOS transistor;
• a second MOS transistor having the same conductivity type with the first MOS transistor and a drain connected to a source of the first MOS transistor;
• a power supply line connected to the source of the second MOS transistor, wherein a control signal having a first state for allowing the second MOS transistor to be on-state and a second state for allowing the second MOS transistor to be off-state is applied to the gate of second MOS transistor;
• and
• a tunnel current generated between the gate and the source of the first MOS transistor is smaller than a tunnel current generated between the gate and the source of the first MOS transistor when a voltage difference between the respective sources of the first and the second MOS transistors is identical.