US 2014/0233320 A1 · NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

Abstract

A nonvolatile semiconductor memory device includes a memory cell, a bit line electrically connected to the memory cell, a sense amplifier that includes a first transistor having a first end electrically connected to the bit line, a second transistor electrically connected between a second end of the first transistor and ground, a third transistor electrically connected between a second end of the first transistor and a source line, and a controller configured to control the first, second, and third transistors after performing a program operation. After the program operation, the first and second transistors are turned on and then while the first transistor remains turned on, the second transistor is turned off and the third transistor is turned on.

Claims20

Dependent claims

A nonvolatile semiconductor memory device comprising:

a memory cell;
a bit line electrically connected to the memory cell;
a sense amplifier that includes a first transistor having a first end electrically connected to the bit line;
a second transistor electrically connected between a second end of the first transistor and ground;
a third transistor electrically connected between a second end of the first transistor and a source line;
and
a controller configured to control the first, second, and third transistors after performing a program operation, wherein after the program operation,
the first and second transistors are turned on and then while the first transistor remains turned on, the second transistor is turned off and the third transistor is turned on.

5 more elements

A nonvolatile semiconductor memory device comprising:

first and second memory strings each including a plurality of memory cells;
a first bit line that is electrically connected to a first end of the first memory string;
a second bit line that is electrically connected to a first end of the second memory string;
a source line that is electrically connected to second ends of the first and second memory strings;
a first sense amplifier that includes a first transistor having a first end electrically connected to the first bit line, a second transistor having a first end electrically connected to the first bit line and the first end of the first transistor, and a third transistor having a first end electrically connected to a second end of the second transistor;
and
a second sense amplifier that includes a fourth transistor having a first end electrically connected to the second bit line, a fifth transistor having a first end electrically connected to the second bit line and the first end of the fourth transistor, and a sixth transistor having a first end electrically connected to a second end of the fifth transistor,
wherein, during a write operation, after a first voltage is applied to the first bit line, a second voltage which is higher than the first voltage is applied to the second bit line, and a third voltage which is higher than the first voltage and lower than the second voltage is applied to the source line, and then, after the write operation, the first and fourth transistors are turned on and second ends of the first and fourth transistors are connected to a ground voltage, and the third and sixth transistors are turned off.

5 more elements

Dependencies are inferred from the claim text.

Nonvolatile semiconductor memory device

Life of this patent

Nonvolatile semiconductor memory device

Life of this patent

Abstract

Claims20