Method For Fabricating A Multi-Gate Device

A method of fabricating a semiconductor device, the method comprising:

• forming a fin structure and an isolation structure on a wafer substrate, wherein the fin structure is embedded in the isolation structure;
• forming two gate stacks around the fin structure
• depositing a first inter-layer dielectric (ILD) layer over the gate stacks;
• removing portions of the first ILD layer, wherein a recess is formed between the two gate stacks;
• depositing a second ILD layer over the first ILD layer, including in the recess;
• and
• removing portions of the second ILD, leaving the second ILD layer in the recess.

A method of fabricating a semiconductor device, the method comprising:

• forming a fin structure and an isolation structure on a wafer substrate, wherein the fin structure embedded in the isolation structure;
• performing a recess process to remove portions of the isolation structure;
• forming a dummy gate stack around the fin structure, where in the dummy gate stack includes a first sacrificial layer disposed over the fin structure, a second sacrificial layer disposed over the first sacrificial layer, and a spacer disposed on sidewalls of the first and second sacrificial layers;
• forming a source/drain around the dummy gate stack;
• depositing an etch stop layer over the dummy gate stack;
• depositing an first inter-layer dielectric (ILD) layer over the etch stop layer;
• removing portions of the first ILD layer to expose the etch stop layer disposed on top of the dummy gate stack and form a dish shape profile of the first ILD layer;
• depositing a second ILD layer over the first ILD layer, wherein a dish shaped second ILD layer covers the first ILD layer;
• removing portions of the second ILD and the etch stop layer disposed on top of the dummy gate stack so that the second sacrificial layer inside the dummy gate stack is exposed to the air;
• removing the second and first sacrificial layers inside the dummy gate stack to form an empty space inside the dummy gate stack;
• and
• forming a gate stack by filing the empty space with a first interfacial layer around the fin structure, a second interfacial layer over the first interfacial layer, and a gate layer over the second interfacial layer.

A method for making a semiconductor device, comprising:

• forming at least two fin structures in an isolation feature of a substrate;
• forming at least two gate stacks around the two fin structures respectively;
• forming a first inter-layer dielectric (ILD) layer between the two gate stacks, wherein a portion of the first ILD layer has a top surface lower than a top surface of the gate stacks, thereby forming a recess with a dish-shaped profile;
• and
• forming a second ILD layer over the first ILD layer and in the recess, where the second ILD layer has a top surface that is approximately the same as the top surface of the gate stacks.