Methods of inducing a desired stress in the channel region of a transistor by performing ion implantation/anneal processes on the gate electrode

A method of forming an integrated circuit product comprised of an N-type transistor and a P-type transistor, comprising:

• forming a gate structure for said N-type transistor above a first active area of a semiconductor substrate, said gate structure of said N-type transistor comprising a gate insulation layer and a gate electrode comprised of a silicon-containing material;
• forming first sidewall spacer structures adjacent said gate structure of said N-type transistor;
• forming a gate structure for said P-type transistor above a second active area of said semiconductor substrate, said gate structure of said P-type transistor comprising a gate insulation layer and a gate electrode comprised of a silicon-containing material;
• forming second sidewall spacer structures adjacent said gate structure of said P-type transistor;
• forming a masking layer that allows implantation of ions into said gate electrodes of said N- and P-type transistors but not into areas of said first and second active regions where source/drain regions for said N- and P-type transistors will be formed;
• performing a gate ion implantation process to implant ions into said gate electrodes of both of said N- and P-type transistors to thereby form a gate ion implant regions comprised of said ions in said gate electrode for said N-type transistor and in said gate electrode of said P-type transistor;
• after performing said gate ion implantation process, performing an anneal process.

An N-type transistor, comprising

• a gate structure positioned above a semiconductor substrate, said gate structure comprising a gate insulation layer and a gate electrode comprised of a silicon-containing material;
• sidewall spacer structures positioned adjacent said gate structure;
• a plurality of source/drain regions for said transistor;
• and
• a gate implant region positioned in said gate electrode, wherein said gate implant region is comprised of ions at a concentration level that falls within the range of 5e18-5e21 ions/cm3, wherein said ions are ions of phosphorous, arsenic or a material with an atomic size that is equal to or greater than the atomic size of phosphorous.