Process For Forming Resistive Switching Memory Cells Using Nano-Particles
AssigneeSanDisk 3D LLC
InventorsJames K. Kai, Takashi W. Orimoto, Vinod R. Purayath, George Matamis
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AssigneeSanDisk 3D LLC
InventorsJames K. Kai, Takashi W. Orimoto, Vinod R. Purayath, George Matamis
Estimating the term…
A process for forming reversible resistance-switching memory cells having resistance-switching nano-particles which provide a reduced contact area to top and bottom electrodes of the memory cells, thereby limiting a peak current. Recesses are formed in a layered semiconductor material above the bottom electrodes, and one or more coatings of nano-particles are applied. The nano-particles self-assemble in the recesses so that they are positioned in a controlled manner. A top electrode material is then deposited. In one approach, the recesses are formed by spaced-apart trenches, and the nano-particles self-assemble along the spaced-apart trenches. In another approach, the recesses for each resistance-switching memory cell are separate from one another, and the resistance-switching memory cells are pillar-shaped. The coatings can be provided in one layer, or in multiple layers which are separated by an insulation layer.
A method for fabricating a resistance-switching memory device, comprising:
A method for fabricating a resistance-switching memory device, comprising:
A method for fabricating a resistance-switching memory device, comprising:
Dependencies are inferred from the claim text.