FinFETs and Methods for Forming the Same

A method comprising:

• forming a semiconductor fin, wherein the semiconductor fin is higher than top surfaces of isolation regions, wherein the isolation regions are on opposite sides of the semiconductor fin, and wherein a middle portion and end portions of the semiconductor fin are heavily doped to p-type or n-type;
• replacing a middle portion of the semiconductor fin with a semiconductor material;
• forming a gate dielectric on sidewalls and a top surface of the semiconductor material;
• and
• forming a gate electrode over the gate dielectric.

A method comprising:

• forming isolation regions extending from a top surface of a semiconductor substrate into the semiconductor substrate;
• etching a portion of the semiconductor substrate between the isolation regions to form a first recess;
• performing a first epitaxy to form a semiconductor strip in the first recess;
• recessing the isolation regions, wherein a portion of the semiconductor strip over top surfaces of the recessed isolation regions forms a semiconductor fin;
• forming a dummy gate to cover a middle portion of the semiconductor fin;
• forming an Inter-Layer Dielectric (ILD) to cover end portions of the semiconductor fin, wherein the end portions of the semiconductor fin are on opposite sides of the middle portion;
• removing the dummy gate to form a second recess;
• removing the middle portion of the semiconductor fin to form a third recess;
• performing a second epitaxy to grow a semiconductor material in the third recess;
• and
• forming a gate dielectric and a gate electrode in the second recess.