Rotational Synchronizer Circuit for Metastablity Resolution

A method comprising:

• sequentially selecting inputs of a multiplexer, wherein each of the inputs of the multiplexer is coupled to an output of a corresponding one of M+1 latches, wherein the multiplexer includes M+1 inputs, and where the inputs are selected one at a time;
• sequentially latching data into two or more of the M+1 latches, wherein each of the M+1 latches is coupled to receive data through a common data input, and wherein each of the M+1 latches is configured to latch data responsive to receiving a particular one of two or more successive clock pulses during a same clock pulse when its output is selected as an input to the multiplexer, wherein data is latched into the two or more of the M+1 latches one latch at a time.

A synchronizer comprising:

• a plurality of M+1 data paths coupled in parallel between a common data input and an output of a multiplexer, wherein each of the M+1 data paths includes one of M+1 latch circuits each coupled to receive data from the common data input and each having a respective output coupled to a corresponding one of M+1 inputs of the multiplexer, wherein the multiplexer is configured to select one of its M+1 inputs responsive to receiving a corresponding one of M+1 selection signals;
• a control circuit configured to cause two or more of the M+1 latch circuits to latch data one at a time in a repeating sequence, and further configured to cause the multiplexer to select outputs of the two or more the M+1 latch circuits one at a time in the repeating sequence, wherein the control circuit is configured to cause the multiplexer to select an output of a given one of the M+1 latch circuits during an operational cycle subsequent to an operational cycle in which the given one of the M+1 latch circuits is activated.