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AssigneeAltera Corporation
InventorJeffrey Christopher Chromczak
Estimating the term…
Integrated circuits with sequential logic circuitry are provided. Sequential logic circuitry may include a chain of bypassable clocked storage elements coupled between a speed critical input terminal and a speed critical output terminal. Combinational logic circuits may be interposed between each adjacent pair of bypassable clocked storage elements in the chain. Dynamic voltage-frequency scaling (DVFS) control circuitry may provide an adjustable power supply voltage to the combinational logic circuits and may provide an adjustable clock signal to control the clocked storage elements. The DVFS control circuitry may be used to selectively enable at least some of the bypassable clocked storage elements while disabling other bypassable clocked storage elements so that the power supply voltage can be reduced while maintaining the same operating frequency. The power supply voltage and the frequency of the clock signal can be adjusted to provide the desired voltage-frequency tradeoff.
A method of operating an integrated circuit in at least first and second states, wherein the integrated circuit includes logic circuitry interposed in a data path, the method comprising:
An integrated circuit, comprising:
A method of operating an integrated circuit, wherein the integrated circuit includes logic circuitry having a feedback loop interposed in a data path, the method comprising:
Dependencies are inferred from the claim text.