Zero sum signaling in a digital system environment
AssigneeMayo Foundation for Medical Education and Research
InventorsErik S. Daniel, Robert W. Techentin
Life of this patent
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Abstract
Zero sum signaling schemes utilize coding across data words to allow the use of single-ended buffers while mitigating simultaneous switching noise (SSN) in digital systems. Zero sum signaling may include balanced zero sum coding (target disparity=0) and nearly balanced zero sum coding (target disparity=±d). Zero sum signaling may reduce simultaneous switching noise as compared to single-ended signaling while allowing a reduction in the number of physical channels (e.g. circuit board traces) by nearly a factor of two as compared to differential signaling.
Claims21
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A system comprising:
- a plurality of devices that communicate using n-bit data words;
- a plurality of encoders, each associated with a different one of the plurality of devices, and each of which receives an n-bit data word from the associated device and encodes the n-bit data word into a corresponding (n+p)-bit data word comprised of an n-bit modified data word and a p-bit parity word, the n-bit modified data word having a number of ones and a number of zeroes, wherein the number of ones is within a disparity ±d as compared to the number of zeroes;
- a plurality of interconnects that route the (n+p)-bit modified data words between the plurality of devices;
- and
- a plurality of decoders, each associated with a different one of the plurality of devices, and each of which decodes one or more of the (n+p)-bit modified data words into the corresponding n-bit data words for receipt by the associated one of the plurality of devices.
A method comprising:
- generating an n-bit data word at a first device;
- encoding the n-bit data word into a corresponding (n+p)-bit data word comprised of an n-bit modified data word and a p-bit parity word, the n-bit modified data word having a number of ones and a number of zeroes, wherein the number of ones is within a disparity ±d as compared to the number of zeroes;
- transmitting the (n+p)-bit data word from the first device to a second device;
- and
- decoding the (n+p)-bit data word into the corresponding n-bit data word for receipt by the second device.
A system comprising:
- a first device and a second device that communicate using n-bit data words;
- an encoder associated with the first processing element that receives an n-bit data word from the first processing element and encodes the n-bit data word into a corresponding (n+p)-bit data word comprised of an n-bit modified data word and a p-bit parity word, the n-bit modified data word having a number of ones and a number of zeroes, wherein the number of ones is within a disparity ±d as compared to the number of zeroes;
- and
- a decoder associated with the second processing element that decodes the (n+p)-bit data word into the corresponding n-bit data word for receipt by a second processing element.
Dependencies are inferred from the claim text.