Generation of simulated errors for high-level system validation
AssigneeEmulex Corporation
InventorsBruce Gregory Warren, Carl Joseph Mies, William Eugene Morgan, William Patrick Goodwin
Life of this patent
Estimating the term…
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AssigneeEmulex Corporation
InventorsBruce Gregory Warren, Carl Joseph Mies, William Eugene Morgan, William Patrick Goodwin
Estimating the term…
A device, integrated circuit and method for generating simulated errors are disclosed. In the disclosed device, integrated circuit and method, an original data value is read from a memory. The original data value is intercepted by the integrated circuit. The integrated circuit is operable to virtualize an error in the original data value to generate a modified data value. The integrated circuit is also operable to generate an interrupt according to the virtualization. This disclosure may be particularly useful for high-level memory validation.
A device comprising:
2-29. (canceled)
A method comprising:
An integrated circuit comprising:
Dependencies are inferred from the claim text.