Data compression and decompression using simd instructions

A computer system, comprising:

• a data processor and memory accessible by the data processor, the memory storing computer programs executable by the data processor, including at least one application program and a set of functions that implement operations to perform decompression of compressed data in a compressed data packet stored in the memory, the at least one application program and the set of functions including single instruction multiple data (SIMD) instructions for at least a portion of the operations to be executed by the data processor, the compressed data including exponent tokens and packed interleaved mantissa bits for a plurality of encoding groups, the data processor including a set of registers;
• a decode bit register of the register set, the data processor responsive to a SIMD instruction for operations to transfer a plurality of compressed data bits from the compressed data packet to the decode bit register;
• a first exponent register of the register set, the data processor responsive to a SIMD instruction for operations to extract and decode an exponent token from the decode bit register to produce at least one decoded exponent value to store in the first exponent register, wherein each decoded exponent value corresponds to a particular encoding group;
• a packed mantissa register of the register set, the data processor responsive to a SIMD instruction for operations to transfer a portion of the compressed data bits from the decode bit register to the packed mantissa register, the portion including packed interleaved mantissa bits corresponding to the particular encoding group;
• a staging register of the register set, the data processor responsive to a SIMD instruction for operations to transfer a subset of nibbles from the packed mantissa register to a first subset of nibbles in the staging register in accordance with the decoded exponent value for the particular encoding group and to insert fill values into a second subset of nibbles in the staging register, wherein the decoded exponent value indicates a number of nibbles of interleaved mantissa bits in the subset from the packed mantissa register to form the first subset in the staging register;
• and
• deinterleaver logic to deinterleave bits of the nibbles in the staging register to produce a plurality of operands to store in a first register, wherein the deinterleaver logic maps the bits of a given nibble based on a place value of the bits in respective operands, wherein the operands have a data format used by the data processor.

A method for data compression using a data processor, the method comprising steps of:

• storing a plurality of operands corresponding to an encoding group of data samples in a first register of a register set of the data processor;
• determining a maximum exponent value of the plurality of operands in the first register;
• interleaving bits of the operands in the first register to produce a plurality of nibbles to store in a second register of the register set, wherein the interleaving maps the bits to a given nibble based on a place value of the bits in respective operands;
• selecting a subset of nibbles from the plurality of nibbles in the second register to store in a third register of the register set, wherein a number of nibbles for the subset is based on the maximum exponent value, wherein the subset of nibbles includes interleaved mantissa bits of the operands;
• and
• packing the interleaved mantissa bits of the subset of nibbles from the third register to a compressed data packet, wherein the packed interleaved mantissa bits represent compressed data for the encoding group of data samples, wherein the data processor responds to at least one single instruction multiple data (SIMD) instruction to perform at least one of the steps.

A method of decompressing compressed data using a data processor, the method comprising steps of:

• transferring a plurality of compressed data bits from a compressed data packet to a decode bit register of a register set of the data processor, the compressed data including exponent tokens and packed interleaved mantissa bits for a plurality of encoding groups in the compressed data packet;
• decoding an exponent token from the decode bit register to produce at least one decoded exponent value, wherein each decoded exponent value corresponds to a particular encoding group;
• transferring a portion of the compressed data bits from the decode bit register to the packed mantissa register, the portion including packed interleaved mantissa bits corresponding to the particular encoding group;
• transferring a subset of nibbles from the packed mantissa register to a first subset of nibbles in a staging register of the register set, wherein the decoded exponent value for the particular encoding group indicates a number of nibbles of interleaved mantissa bits in the subset from the packed mantissa register to form the first subset in the staging register;
• inserting fill values into a second subset of nibbles in the staging register;
• and
• deinterleaving bits of the nibbles in the staging register to produce a plurality of operands to store in a first register of the register set by mapping the bits of a given nibble based on a place value of the bits in respective operands, wherein the operands have a data format used by the data processor, wherein the data processor responds to at least one single instruction multiple data (SIMD) instruction to perform at least one of the steps.

A article of manufacture, comprising:

• a memory readable by a data processor, the memory storing instructions executable by the data processor, including single instruction multiple data (SIMD) instructions for at least a portion of operations for decompression of compressed data to be executed by the data processor, the operations to transfer a plurality of compressed data bits from a compressed data packet to a decode bit register of a register set of the data processor, the compressed data to include exponent tokens and packed interleaved mantissa bits for a plurality of encoding groups in the compressed data packet, to decode an exponent token from the decode bit register to produce at least one decoded exponent value corresponding to a particular encoding group, to transfer a portion of the compressed data bits from the decode bit register to the packed mantissa register, the portion to include packed interleaved mantissa bits corresponding to the particular encoding group, to transfer a subset of nibbles from the packed mantissa register to a first subset of nibbles in a staging register of the register set, the decoded exponent value for the particular encoding group to indicate a number of nibbles of interleaved mantissa bits in the subset from the packed mantissa register to form the first subset in the staging register, to insert fill values into a second subset of nibbles in the staging register, and to deinterleave bits of the nibbles in the staging register to produce a plurality of operands to store in a first register of the register set, the bits of a given nibble to be mapped to respective operands based on a place value of the bits in the respective operands, the operands to have a data format used by the data processor.