Hardware accelerated communications over a chip-to-chip interface

A computing apparatus comprising:

• a host processor;
• a cellular communication modem;
• a memory-mapped communication path disposed between the host processor and the cellular-communication modem;
• means for providing logical channels over the memory-mapped communication path;
• means for transporting data organized according to one or more cellular communication protocols over at least one of the logical channels;
• means for acknowledging when data transfer occurs between the host processor and the cellular-communication modem;
• means for issuing commands between the host processor and the cellular-communication modem;
• and
• means for communicating and managing a power state via one or more of the logical channels.

A non-transitory, tangible processor readable storage medium, encoded with processor readable instructions to perform a method for communicating, via a memory-mapped communication path, between a host processor and a cellular-communication modem, the method comprising:

• providing logical channels over the memory-mapped communication path;
• transporting data organized according to one or more cellular communication protocols over at least one of the logical channels;
• acknowledging when data transfer occurs between the host processor and the cellular-communication modem;
• issuing commands between the host processor and the cellular-communication modem;
• and
• communicating and managing a power state via one or more of the logical channels.