Sensing pixel and image sensor including same

A three-dimensional (3D) image sensor comprising:

• a light source configured to emit amplitude-modulated light to a subject;
• a pixel array including a plurality of sensing pixels for outputting color-filtered pixel signals according to the modulated light reflected by the subject;
• a row decoder configured to generate a driving signal for driving each row of the pixel array;
• an image processing unit configured to generate a color image from the color-filtered pixel signals output from the pixel array and to generate a depth image from color-filtered pixel signals output from the pixel array;
• and
• a timing circuit configured to provide a timing signal and a control signal to the row decoder and the image processing unit,
• wherein each of the sensing pixels comprises:
• a first photoelectric conversion device configured to generate a first electrical charge by converting the modulated light reflected by the subject;
• a first capture transistor, controlled by a capture signal applied to the control gate of the first capture transistor, and the first photoelectric conversion device being connected to the drain of the first capture transistor;
• a first transfer transistor, controlled by a transfer signal applied to the control gate of the first transfer transistor, the source of the first capture transistor being connected to the drain of the first transfer transistor;
• and
• a first floating diffusion region being connected to the source of the first transfer transistor.

A depth-sensing pixel comprising:

• first, second, third and fourth co-adjacent photoelectric conversion devices configured to generate a first, second, third and fourth electrical charge, respectively, by converting amplitude-modulated modulated light reflected by a subject;
• first, second, third and fourth transfer transistors, controlled by a transfer signal applied to the control gates of the first, second, third and fourth transfer transistors, for transferring the first, second, third and fourth electrical charges;
• and
• first, second, third and fourth floating diffusion regions connected to the source of the first, second, third and fourth transfer transistors, respectively, for storing the first electrical charge accumulated, the second electrical charge accumulated, the third electrical charge accumulated and the fourth electrical charge accumulated, respectively.