Charge pump and method of biasing deep n-well in charge pump
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYvonne LIN, Tien-Chun YANG
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYvonne LIN, Tien-Chun YANG
Estimating the term…
A charge pump has at least one charge pump stage. Each charge pump stage includes at least one NMOS device. The at least one NMOS device has a deep N-well (DNW), a gate and a drain, and is coupled to at least one capacitor, a first node, a second node and a switch. For the at least one NMOS device, the gate is capable of receiving a different signal from the drain. The first node is arranged to receive an input signal. The switch is coupled between the at least one NMOS device and a ground. A drain of the switch is coupled to a deep N-well of the switch. The at least one capacitor is arranged to store electrical charges. The charge pump stage is configured to supply the electrical charges to the second node. The DNW is coupled to the ground for a negative pump operation.
A charge pump having at least one charge pump stage, each charge pump stage comprising:
A method of biasing a deep N-well of at least one NMOS device coupled to at least one capacitor in a charge pump circuit comprising:
A charge pump having at least one charge pump stage, each charge pump stage comprising:
Dependencies are inferred from the claim text.