US 2014/0197874 A1Published application

Balanced frequency mixer circuit

AssigneeNational Chi Nan University

InventorsTzung-Min TSAI, Yo-Sheng LIN, Wei-Chen WEN

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Abstract

A frequency mixer circuit includes a mixer, a load stage, and again stage. The load stage cooperates with the mixer to generate a differential output voltage signal with a mixed frequency according to a differential local oscillator voltage signal and a differential input voltage signal. The gain stage has a transconductance, and a magnitude of the differential current signal and the transconductance have a positive relationship therebetween, so as to result in a positive relationship between the transconductance and a conversion gain which is a ratio of magnitude of the differential output voltage signal to magnitude of the differential input voltage signal.

Claims15

Dependent claims

A frequency mixer circuit comprising:

a mixer configured to receive a differential local oscillator (LO) voltage signal with a LO frequency, and a differential input voltage signal with an input frequency, and configured to generate a differential current signal having a mixed frequency associated with the LO frequency and the input frequency;
a load stage having an impedance, coupled to said mixer for receiving the differential current signal therefrom, and cooperating with said mixer to generate, based upon the differential current signal and the impedance of said load stage, a differential output voltage signal with the mixed frequency, wherein a ratio of magnitude of the differential output voltage signal to magnitude of the differential input voltage signal is defined as a conversion gain;
and
a gain stage coupled to said mixer, having a first transconductance, and configured such that a magnitude of the differential current signal and the first transconductance have a positive relationship therebetween, so as to result in a positive relationship between the conversion gain and the first transconductance.

1 more element

Dependencies are inferred from the claim text.

Facts

Application: 13/940,604Filed 12 Jul 2013
Priority: TW 10210181417 Jan 2013
Published: 17 Jul 2014
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H03D 7/1441
With transistors: using field-effect transistors
H03D 7/1458
With transistors: double balanced arrangements, i.e. where both input signals are differential
H03D 7/1491
With transistors: arrangements to linearise a transconductance stage of a mixer arrangement
H03D 2200/0019
Circuit elements of demodulators: gilbert multipliers

Family

US 8,829,974 B2Related patent
US 2014/0197874 A1This patent

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