Placement of storage cells on an integrated circuit

A method for configuring the placement of a plurality of storage cells on an integrated circuit comprising:

• determining a sensitive direction and an insensitive direction of the plurality of storage cells;
• grouping the plurality of storage cells into a plurality of words, wherein each of the plurality of words is protected by an error control mechanism;
• placing each of the storage cells on the integrated circuit such that a distance in the insensitive direction between any two of the storage cells belonging to one of the plurality of words is greater than a minimum distance;
• and
• wherein the minimum distance is configured such that a probability of any of the plurality of words experiencing multiple radiation induced errors is below a threshold value.

An integrated circuit comprising:

• a plurality of storage cells grouped into a plurality of words, wherein each of the storage cells on the integrated circuit is disposed such that a distance between any two of the storage cells belonging to one of the plurality of words is greater than a minimum distance;
• and
• an error control mechanism configured to protect each of the plurality of words;
• wherein the minimum distance is configured such that a probability of any of the plurality of words experiencing multiple radiation induced errors is below a threshold value.