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US 2014/0197856 A1Published application
Self testing fault circuit apparatus and method
AssigneeLeviton Manufacturing Co., Inc.
InventorsMichael OSTROVSKY, Adam KEVELOS
Life of this patent
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Abstract
A process for self testing a fault circuit includes disabling an actuator, performing a self test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a hall cycle of a second polarity, and determining whether the self test was successful.
Claims35
1-34. (canceled)
A process for self testing a fault circuit comprising:
- a) disabling an actuator;
- b) performing a self test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a half cycle of a second polarity;
- and
- c) determining whether the self test was successful.
1 more element
64-70. (canceled)
A method for testing a fault circuit comprising the following steps:
- a) periodically preventing an actuator from activating;
- b) activating a self test by creating a current imbalance, which occurs across at least two different half cycles of opposite polarity;
- c) testing a fault circuit by reading said current imbalance.
72-74. (canceled)
A method for testing a fault circuit comprising:
- periodically outputting a circuit hinder signal to hinder a disconnect signal from a fault detector circuit, the circuit hinder signal being output at a first period of time;
- outputting a test signal to said fault detector circuit only if the circuit hinder signal is output, the test signal testing said fault detector circuit;
- receiving from said fault detector circuit an output signal in response to the test signal when said fault detector is operative;
- and
- activating an alarm during a second period of time if the output signal is not received during said first period of time.
2 more elements
76-77. (canceled)
Dependencies are inferred from the claim text.