Capacitor charging circuit with low sub-threshold transistor leakage current

A capacitor charging circuit with reduced sub-threshold transistor leakage current, the circuit comprising:

• an input node;
• an output node;
• a control node;
• first and second series connected primary field effect transistors, each of the primary transistors having a gate electrode coupled to the control node, wherein the first primary transistor is coupled between the input node and the output node, and the second primary transistor is coupled between the output node and a leakage current reduction node;
• and
• first and second series connected leakage current reduction field effect transistors, each of the leakage current reduction transistors having a gate electrode coupled to the control node, wherein the first leakage current reduction transistor is coupled between a power supply line and the leakage current reduction node and the second one of the leakage current reduction transistors is coupled between the leakage current reduction node and a ground line,
• wherein, in operation, when a control signal at the control node is at a ground potential, the first primary transistor and the first leakage current reduction transistor are in a conductive state and the second primary transistor and the second leakage current reduction transistor are in a non-conductive state, thereby substantially eliminating a sub-threshold leakage current flowing through the second primary transistor.