Capacitive sensor integrated onto semiconductor circuit
AssigneeMEAS France
InventorsJean-Paul Guillemet, Predrag Drljaca, Daniel Beeler, Romuald Gallorini, Vincent Ducere
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AssigneeMEAS France
InventorsJean-Paul Guillemet, Predrag Drljaca, Daniel Beeler, Romuald Gallorini, Vincent Ducere
Estimating the term…
There is disclosed a capacitive sensor on a passivation layer of a semiconductor circuit such as an ASIC, and a method for manufacturing such sensor. The system and method may comprise: forming a bottom electrode layer and landing pad on a portion of the passivation layer located over active circuitry of the ASIC; forming a gas sensitive layer onto the bottom electrode layer and the landing pad; creating a via through the gas sensitive layer to expose a portion of the landing pad; forming a top electrode layer onto the gas sensitive layer, wherein the top electrode layer completely overlays a surface area of the bottom electrode layer, and wherein the forming process for the top electrode layer deposits a portion of the top electrode layer into the via hole, thereby forming an electrical connection between the top electrode layer and the landing pad.
A method for manufacturing a capacitive sensor on a passivation layer of a semiconductor circuit, the passivation layer having openings which expose a first bond pad and a second bond pad comprising:
A gas sensor comprising:
A gas sensor comprising:
Dependencies are inferred from the claim text.