Method of forming high voltage device

A method of forming a device, the method comprising:

• forming a well region of a first dopant type in a substrate;
• forming a first well region of a second dopant type in the well region of the first dopant type;
• forming an isolation structure at least partially in the well region of the first dopant type;
• forming a first gate electrode over the isolation structure and the first well region of the second dopant type;
• forming a doped region of the first dopant type in the well region of the first dopant type;
• and
• forming an electrode structure over the isolation structure, the electrode structure being electrically coupled with the doped region.

A method of forming a transistor, comprising:

• forming a well region of a first dopant type in a substrate, the well region of the first dopant type having a first edge and a second edge;
• forming a first well region of a second dopant type in the well region of the first dopant type;
• forming an isolation structure at least partially in the well region of the first dopant type, the isolation structure being between the first well region of the second dopant type and the first edge of the well region of the first dopant type;
• forming a first gate electrode over the isolation structure and the first well region of the second dopant type;
• and
• forming a doped region of the first dopant type in the well region of the first dopant type, the doped region functioning as a drain region of the transistor and being between the isolation structure and the first edge of the well region of the first dopant type, the well region of the first dopant type being free from having another drain region between the isolation structure and the second edge of the well region of the first dopant type.